TI TPS6508700RSKR

TPS6508700RSKR General Description

The TPS6508700 device is a single-chip power-management IC (PMIC) designed for the AMD™ Family 17h Models 10h-1Fh processors targeted for notebooks and all-in-one desktops. The TPS6508700 device offers an input range from 5.6 V to 21 V, enabling use in a wide range of applications. The device is well suited for NVDC and non-NVDC power architecture using 2S, 3S, or 4S Li-Ion battery packs. The D-CAP2™ and DCS-Control™ high-frequency voltage regulators use small inductors and capacitors to achieve a small solution size. The D-CAP2 and DCS-Control topologies have excellent transient response performance, which is optimal for processor core and system memory rails that have fast load switching. An I²C interface allows simple control either by an embedded controller (EC) or by a system on chip (SoC). The PMIC comes in an 8-mm × 8-mm, single-row VQFN package with thermal pad for good thermal dissipation and ease of board routing.

Features

• Wide V_IN Range From 5.6 V to 21 V
• Three Variable-Output Voltage Synchronous
  Step-Down Controllers With DCAP2™ Topology
  • Scalable Output Current Using External FETs With Selectable Current Limit
  • I²C Dynamic Voltage Scaling (DVS) Control for BUCK2 and BUCK6, External Feedback for BUCK1
• Three Variable-Output Voltage Synchronous Step-Down Converters With DCS-Control Topology and I²C DVS Capabilities
  • V_IN Range From 4.5 V to 5.5 V
  • V_OUT Range From 0.425 V to 3.575 V
  • Up to 3 A of Output Current
• Three LDO Regulators With Adjustable Output Voltage
  • LDOA1: I²C-Selectable Output Voltage From 1.35 V to 3.3 V for up to 200 mA of Output Current
  • LDOA2 and LDOA3: I²C-Selectable Output Voltage From 0.7 V to 1.5 V for up to 600 mA of Output Current
• LDO With BUCK6 as Input Voltage
• Three Load Switches With Slew Rate Control
  • Up to 300 mA of Output Current With Voltage Drop Less Than 1.5% of Nominal Input Voltage
  • R_DSON < 96 mΩ at Input Voltage of 1.8 V
• 5-V Fixed-Output Voltage LDO (LDO5)
  • Power Supply for Gate Drivers of SMPS and for LDOA1
  • Automatic Switch to 5-V Buck for Higher Efficiency
• Built-in Sequencing by Factory OTP Programming
  • CTL1, CTL4, and CTL5 Used for G3’, G3, S5, and S0 State Selection
  • GPO1 and GPO2 Used for PG_S0 and PG_S5
  • Open-Drain Interrupt Output Pin
• I²C Interface Supports:
  • Standard Mode (100 kHz)
  • Fast Mode (400 kHz)
  • Fast Mode Plus (1 MHz)

Specifications