SN65HVD233DR

SN65HVD233DR General Description

The SN65HVD233, SN65HVD234, and SN65HVD235 are used in applications employing the controller area network (CAN) serial communication physical layer in accordance with the ISO 11898 standard. As a CAN transceiver, each provides transmit and receive capability between the differential CAN bus and a CAN controller, with signaling rates up to 1 Mbps.

Designed for operation in especially harsh environments, the devices feature cross-wire protection, overvoltage protection up to ±36 V, loss of ground protection, overtemperature (thermal shutdown) protection, and common-mode transient protection of ±100 V. These devices operate over a wide –7 V to 12 V common-mode range. These transceivers are the interface between the host CAN controller on the microprocessor and the differential CAN bus used in industrial, building automation, transportation, and automotive applications.

Modes: The R_S pin (pin 8) of the SN65HVD233, SN65HVD234, and SN65HVD235 provides three modes of operation: high-speed, slope control, and low-power standby mode. The high-speed mode of operation is selected by connecting pin 8 directly to ground, allowing the driver output transistors to switch on and off as fast as possible with no limitation on the rise and fall slope. The rise and fall slope can be adjusted by connecting a resistor between the R_S pin and ground. The slope will be proportional to the pin’s output current. With a resistor value of 10 kΩ the device driver will have a slew rate of ~15 V/µs and with a value of 100 kΩ the device will have ~2.0 V/µs slew rate. For more information about slope control, refer to Feature Description.

The SN65HVD233, SN65HVD234, and SN65HVD235 enter a low-current standby (listen only) mode during which the driver is switched off and the receiver remains active if a high logic level is applied to the R_S pin. If the local protocol controller needs to transmit a message to the bus it will have to return the device to either high-speed mode or slope control mode via the R_S pin.

Loopback (SN65HVD233): A logic high on the loopback (LBK) pin (pin 5) of the SN65HVD233 places the bus output and bus input in a high-impedance state. Internally, the D to R path of the device remains active and available for driver to receiver loopback that can be used for self-diagnostic node functions without disturbing the bus. For more information on the loopback mode, refer to Feature Description.

Ultra Low-Current Sleep (SN65HVD234): The SN65HVD234 enters an ultra low-current sleep mode in which both the driver and receiver circuits are deactivated if a low logic level is applied to EN pin (pin 5). The device remains in this sleep mode until the circuit is reactivated by applying a high logic level to pin 5.

Autobaud Loopback (SN65HVD235): The AB pin (pin 5) of the SN65HVD235 implements a bus listen-only loopback feature which allows the local node controller to synchronize its baud rate with that of the CAN bus. In autobaud mode, the bus output of the driver is placed in a high-impedance state while the bus input of the receiver remains active. There is an internal D pin to R pin loopback to assist the controller in baud rate detection, or the autobaud function. For more information on the autobaud mode, refer to Feature Description.

Features

• Single 3.3-V Supply Voltage
• Bus Pins Fault Protection Exceeds ±36 V
• Bus Pins ESD Protection Exceeds ±16 kV HBM
• Compatible With ISO 11898-2
• GIFT/ICT Compliant
• Data Rates up to 1 Mbps
• Extended –7 V to 12 V Common Mode Range
• High-Input Impedance Allows for 120 Nodes
• LVTTL I/Os are 5-V Tolerant
• Adjustable Driver Transition Times for Improved Emissions Performance
• Unpowered Node Does Not Disturb the Bus
• Low Current Standby Mode, 200-µA (Typical)
• SN65HVD233: Loopback Mode
• SN65HVD234: Ultra Low Current Sleep Mode
  • 50-nA Typical Current Consumption
• SN65HVD235: Autobaud Loopback Mode
• Thermal Shutdown Protection
• Power up and Down With Glitch-Free Bus Inputs and Outputs
  • High-Input Impedance With Low V_CC
  • Monolithic Output During Power Cycling

Application

Specifications